Chapter 8

[E] Give a critique of the following statement: "Using a faster processor chip results in a corresponding increase in performance of a computer even if the main memory speed remains the same."

[E] A block-set-associative cache consists of a total of 64 blocks, divided into 4-block sets. The main memory contains 4096 blocks, each consisting of 32 words. Assuming a 32 -bit byte-addressable address space, how many bits are there in each of the Tag, Set, and Word fields?

[E] The cache block size in many computers is in the range of 32 to 128 bytes. What would be the main advantages and disadvantages of making the size of cache blocks larger or smaller?

[M] A computer has two cache levels Ll and L2. Plot two graphs for the average memory access time (y-axis) versus hit rate \(h_{1}\) ( \(x\)-axis) for the two values \(h_{2}=0.75\) and \(h_{2}=0.85\). Use the values \(0.90,0.92,0.94\), and \(0.96\), for \(h_{1}\). Assume that the miss penalties are \(15 \tau\) and \(100 \tau\) for the L1 and L2 caches, respectively, where \(\tau\) is the access time of the Ll caches.

[E] Consider the following analogy for the concept of caching. A serviceman comes to a house to repair the heating system. He carries a toolbox that contains a number of tools that he has used recently in similar jobs. He uses these tools repeatedly, until he reaches a point where other tools are needed. It is likely that he has the required tools in his truck outside the house. But, if the needed tools are not in the truck, he must go to his shop to get them. Suppose we argue that the toolbox, the truck, and the shop correspond to the \(\mathrm{Ll}\) cache, the L2 cache, and the main memory of a computer. How good is this analogy? Discuss its correct and incorrect features.

[E] The purpose of using an L2 cache is to reduce the miss penalty of the L1 cache, and in turn to reduce the memory access time as seen by the processor. An alternative is to increase the size of the Ll cache to increase its hit rate. What limits the utility of this approach?

[M] Consider a computer system in which the available pages in the physical memory are divided among several application programs. The operating system monitors the page transfer activity and dynamically adjusts the number of pages allocated to various programs. Suggest a suitable strategy that the operating system can use to minimize the overall rate of page transfers.

[M] In a computer with a virtual-memory system, the execution of an instruction may be interrupted by a page fault. What state information has to be saved so that this instruction can be resumed later? Note that bringing a new page into the main memory involves a DMA transfer, which requires execution of other instructions. Is it simpler to abandon the interrupted instruction and completely re-execute it later? Can this be done?

[E] When a program generates a reference to a page that does not reside in the physical main memory, execution of the program is suspended until the requested page is loaded into the main memory from a disk. What difficulties might arise when an instruction in one page has an operand in a different page? What capabilities must the processor have to handle this situation?

[M] A disk unit has 24 recording surfaces. It has a total of 14,000 cylinders. There is an average of 400 sectors per track. Each sector contains 512 bytes of data. (a) What is the maximum number of bytes that can be stored in this unit? (b) What is the data transfer rate in bytes per second at a rotational speed of \(7200 \mathrm{rpm}\) ? (c) Using a 32-bit word, suggest a suitable scheme for specifying the disk address.

[M] Consider a long sequence of accesses to a disk with \(8 \mathrm{~ms}\) average seek time, \(3 \mathrm{~ms}\) average rotational delay, and a data transfer rate of \(60 \mathrm{Mbytes} / \mathrm{sec}\). The average size of a block being accessed is 64 Kbytes. Assume that each data block is stored in contiguous sectors. (a) Assuming that the blocks are randomly located on the disk, estimate the average percentage of the total time occupied by seek operations and rotational delays. (b) Suppose that 20 blocks are transferred in sequence from adjacent cylinders, reducing seek time to \(1 \mathrm{~ms}\). The blocks are randomly located on these cylinders. What is the total transfer time?

[M] The average seek time and rotational delay in a disk system are \(6 \mathrm{~ms}\) and \(3 \mathrm{~ms}\), respectively. The rate of data transfer to or from the disk is \(30 \mathrm{Mbytes} / \mathrm{sec}\), and all disk accesses are for 8 Kbytes of data, stored in contiguous sectors. Data blocks are stored at random locations on the disk. The disk controller has an 8-Kbyte buffer. The disk controller, the processor, and the main memory are all attached to a single bus. The bus data width is 32 bits, and a single bus transfer to or from the main memory takes 10 nanoseconds. (a) What is the maximum number of disk units that can be simultaneously transferring data to or from the main memory? (b) What percentage of main memory accesses are used by one disk unit, on average, over a long period of time during which a sequence of independent 8-Kbyte transfers takes place?

[M] Magnetic disks are used as the secondary storage for program and data files in most virtual-memory systems. Which disk parameter(s) should influence the choice of page size?